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conceptual UP6055 1 UP6055-ds-c3300, june 2017 www.upi-semi.com rebmunredr oe pytegakca pk ramer daqp5506pu l61-3x3nfqv daqa5506pu high performance, single synchronous step-up controller ?? ?? ? portable charging devices ?? ?? ? power bank ?? ?? ? i/o supplies ?? ?? ? system power supplies general description applications ordering information features pin configuration the UP6055 is a high-efficiency, single synchronous boost controller suitable for high power applications in power bank and e-cigarette. the proprietary rcot tm technology provides fast transient response and high noise immunity. it supports ceramic output capacitors. this combination is ideal for building modern low duty ratio, untra-fast load step response dc-dc converters. the output voltage ranges from 4v to 13v, and the conversion input voltage ranges is from 3v to 5.5v. the switching frequency is fixed 450khz. it is available in a space saving vqfn3x3-16l package. ?? ?? ? wide input voltage range: 3v to 5.5v ?? ?? ? output voltage range: 4v to 13v ?? ?? ? built-in 1% 1v reference ?? ?? ? built-in ldo linear voltage regulator ?? ?? ? rcot tm (robust constant on-time) control architecture ?? ?? ? 450khz switching frequency ?? ?? ? 4000ppm/ o c r ds(on) current sensing ?? ?? ? 8ms soft start ?? ?? ? built-in ovp/uvp/ocp/otp ?? ?? ? vqfn3x3-16l package ?? ?? ? rohs compliant and halogen free note: (1) please check the sample/production availability with upi representatives. (2) upi products are compatible with the current ipc/jedec j-std-020 requirement. they are halogen-free, rohs compliant and 100% matte tin (sn) plating that are suitable for use in snpb or pb-free soldering processes. vqfn3x3-16l 1 24 gnd 3 5 6 7 8 12 11 10 9 1516 1314 fb en ocp comp mode vdd gnd pgnd vreg lg lgrip sw hg boot nc vin upi confidential
conceptual UP6055 2 UP6055-ds-c3300, june 2017 www.upi-semi.com typical application circuit v in =3v~4.5v vin 2.2uf 22uf 22uf 22uf v out =5v/9v/12v boot 5.1 0.1uf vreg 10uf sw 1uh 22uf 22uf hg lg fb 75k 100pf 56k (5v) 226k 56k (9v) agnd vdd 2.2uf en ocp 49k comp 4.7k 2.2nf mode 0 psm fccm disable enable 22uf 75k (12v) 1nf pgnd 100pf lgrip upi confidential
conceptual UP6055 3 UP6055-ds-c3300, june 2017 www.upi-semi.com functional pin description .on ni pe man ni pn oitcnufnip 1p co .gnittesnoitcetorptnerrucrevo ehttesotdng otnipsihtmorfrotsiseratcennoc .levelnoitcetorptnerrucrevo 2n e .elbanepihc .ecivedehtelbasidotdng ottrohs 3b f .tupnikcabdeef r edividrotsisera.reifilpmarorreehtottupnignitrevnieh tsinipsiht .egatlovrotalugertesotdesusidng ottuptuo morf 4p moc .noitasnepmocrellortnoctsoob .dnuorgotkrowtennoitasnepmocatcennoc 5e dom noitidnoc daolthgilniecivedehtrofnipnoitcelesedom noitarepo nehw. nipsihtnehw.edom piks-eslupniskrowecivedeht,dnuorgotdetcennocsinipsi ht .edom mccecrofniskrowecivedeht,hgihdellupsi 6d dv .tupniylppusrewoprellortnoc s rewopdnaciehtrofegatlovsaibsedivorpnipsiht c/r nahtiwtissapybdnatuov otnipsihttcennoc.srotalugerraenilv5lanretnieht .retlif 7d nga .dnuorglangis 8d ngp .nip dngrewoprellortnoc 9g erv .tupniegatlovylppusevirdetag dnatuptuo odlv5 0 1p irgl .noitcejnielppirrevirdetag edis wol dng otpirgl mrofcrseiresatcennoc .poollortnocehtetasnepmocotbfdna 1 1g l .tuptuorevirdetag edis wol etagtefsomrewollanretxenaotnipsihttcennoc .tupni 2 1w s .edonsehctiws ehtotnipsihttcennoc.rotcudnituptuoehtotnipsihttcenn oc .tefsomrewollanretxeehtfoniardehtdnatefsomreppulanr etxeehtfoecruos 3 1g h .tuptuorevirdetag edishgih etagtefsomreppulanretxeotnipsihttcennoc tupni . 4 1t oob .revirdetag tefsomreppu gnitaolfehtrofylppuspartstoob ehttcennoc croticapacpartstoob toob partstooba mrofotnip w sehtdnaniptoobneewteb .tefsomreppuehtnonrutotegrahcehtsedivorproticapacpa rtstoobeht.tiucric ctahterusne toob .ciehtraendecalpsi 5 1c n .detcennocyllanretniton 6 1n iv .tupniylppusrewop .egatlovtuptuoehtottnerrucseilppustahtegatlovtupni upi confidential
conceptual UP6055 4 UP6055-ds-c3300, june 2017 www.upi-semi.com functional block diagram x(-1/8) psm/fccm switch on-time calculator ramp 1v en / ss control 16.8v 0.3v control logic t on one-shot xcon en uv ov ea pwm fb ocp ocp pgnd mode boot sw vdd linear regulator vreg agnd 10ua lg vin comp lgrip hg upi confidential
conceptual UP6055 5 UP6055-ds-c3300, june 2017 www.upi-semi.com the UP6055 implements a unique rcot tm control topology for the synchronous boost. the rcot tm supports extremely low esr output capacitors and makes the design easier and robust. the output voltage ranges from 4v to 13v. the conversion input voltage ranges from 3v up to 5.5v. adaptive on-time control tracks the preset switching frequency over a wide input and output voltage range while allowing the switching frequency to increase at the step- up of the load. the UP6055 has a mode pin to select between force ccm and pulse-skip for light load conditions. the strong gate drivers allow low r ds(on) fets for high-current applications. enable and soft start when the en pin voltage rises above the enable threshold voltage (typically 1.8v), the controller enters its start-up sequence. the internal ldo regulator starts immediately and regulates to 5v at the vreg pin. in the second phase, an internal dac starts ramping up the reference voltage from 0v to 1v. smooth and constant ramp-up of the output voltage is maintained during start-up regardless of load current. on-time control and frequency the UP6055 does not have a dedicated oscillator that determines switching frequency. however, the device runs with pseudo-constant frequency by feed-forwarding the input and output voltages into its on-time one-shot timer. the rcot tm control adjusts the on-time to be inversely proportional to the input voltage and proportional to the output voltage. this makes the switching freuquency fairly constant in steady state conditions over wide input voltage range. the off-time is modulated by a pwm comparator. the fb node voltage (the mid-point of resistor divider) is compared to the internal 1v reference voltage added with a ramp signal. when both signals match, the pwm comparator asserts a set signal to terminate the off-time (turn off the low-side mosfet and turn on high-side mosfet). the set signal is valid if the inductor current level is below the ocp threshold, otherwise the off-time is extended until the current level falls below the threshold. light load condition in pulse-skip operationwhile the mode pin is connected to ground, UP6055 automatically reduces the switching frequency at light load conditions to maintain high efficiency. this reduction of the frequency is achieved smoothly and without increasing vout ripples or load regulation. as the load current is further decreased, it takes longer time to discharge the output capacitor to the level than requires the next on cycle. functional description the transition pin from discontinuous to continuous conduction mode can be calculated as: ) v v ( v v l f i out in out in out osc out = 1 2 1 2 over current limit the UP6055 monitors the inductor peak current by low side mosfet r ds(on) when it turns on. the over current limit is triggered once the sensing current level is higher than v ocset . when triggered, the over current limit will keep low side mosfet off even the voltage loop commands it to turn on. the output voltage will decrease if the load continuously demands more current than current limit level and consequently causes v out to decrease faster until uvp occurs and shuts down the UP6055. the peak current limit threshold is set by connecting a resistor from ocp to gnd. the ocp pin will source a 10ua current and create a voltage drop across r ocp as the v ocset . v ocset = 10ua x r ocp. when the voltage drop across the low side mosfet equals the voltage across the setting resistor, the peak current limit will be activated. the voltage across lx and gnd pins is compared with v ocset for current limit. the peak current limit level is calculated as: 2 8 ripple ) on ( ds ocset lim _ peak i r v i + = where i ripple is the peak-to-peak inductor ripple current at steady state. over voltage/under voltage protection the UP6055 monitors output voltage to detect over voltage and under voltage. when the output voltage becomes higher than 16.8v, the ovp is triggered, low side mosfet is off and the high side mosfet is on. when the feedback voltage is lower than 0.3v, the uvp is triggered, then high side mosfet and low side mosfet are latched. this function is enabled after 13.5ms following en has become high. uvlo protection the UP6055 uses vin under voltage lockout protection (uvlo). when the vin voltage is lower than the uvlo threshold voltage, the switch mode power supply shuts off. this is non-latch protection. over temperature protection the UP6055 monitors the temperature of itself. if the temperature exceeds typical 130 o c, the UP6055 will be turned off. this is the non-latch protection. it will be recovered once temperature is lower than 100 o c. upi confidential
conceptual UP6055 6 UP6055-ds-c3300, june 2017 www.upi-semi.com (note 1) supply voltage,vdd --------------------------------------------------------------------------------------------------------------- -0.3v to +26v sw pin voltage to gnd ------------------------------------------------------------------------------------------------- -0.3v to (vout+ -0.3v) boot pin voltage ---------------------------------------------------------------------------------------------------------------------- -v sw -0.3v to v sw +6v hg pin voltage ---------------------------------------------------------------------------------------------------------------------- -v sw -0.3v to v sw +6v lg pin voltage ------------------------------------------------------------------------------------------------------------------------------- -- -0.3v to +6v vin and vreg pin voltage ------------------------------------------------------------------------------------------------------------ -0.3v to +6v other pins to gnd ------------------------------------------------------------------------------------------------------------------------- -0.3 v to +6v storage temperature range ------------------------------------------------------------------------------------------------------------- -55 o c to +150 o c lead temperature (soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260 o c esd rating (note 2) hbm (human body mode) --------------------------------------------------------------------------------------------------------------------- 2kv mm (machine mode) ----------------------------------------------------------------------------------------------------------------------------- 200v (note 4) input voltage, v in ----------------------------------------------------------------------------------------------------------------------------- --- 3v to 5.5v output voltage, v out --------------------------------------------------------------------------------------------------------------------------- 4 v to 13v operating junction temperature ra nge ------------------------------------------------------------------------------------------ -40 o c to +125 o c operating ambient temperature ra nge ------------------------------------------------------------------------------------------ -40 o c to +85 o c note 1. stresses listed as the above absolute maximum ratings may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. devices are esd sensitive. handling precaution recommended. note 3. ja is measured in the natural convection at t a = 25 o c on a low effective thermal conductivity test board of jedec 51-3 thermal measurement standard. note 4. the device is not guaranteed to function outside its operating conditions. absolute maximum rating thermal information recommended operation conditions package thermal resistance (note 3) vqfn3x3-16l ja -------------------------------------------------------------------------------------------------------------------- 68 o c/w vqfn3x3-16l jc --------------------------------------------------------------------------------------------------------------------- 6 o c/w power dissipation, p d @ t a = 25 c vqfn3x3-16l --------------------------------------------------------------------------------------------------------------------------------- 1.47w upi confidential
conceptual UP6055 7 UP6055-ds-c3300, june 2017 www.upi-semi.com (v dd = 5v, t a =25 o c, unless otherwise specified) electrical characteristics retemara pl obmy ss noitidnoctse tn i mp y tx a ms tinu ylppusrewop dlohserht olvu ni vv nivolvu gnisi r3 8. 29 . 27 9. 2v siseretsy h5 1. 02 . 05 2. 0v tnerrucylppus ni vi niv v ne v,v5= bf i,v1.1= tuo daolon =- -0 6 3- -a u tnerrucylppus dd vi ddv v ne v,v5= bf i,v1.1= tuo daolon =- -6 . 01a m tnerrucnwodtuhs ni vi ds_niv v ne i,v0= tuo daolon =- -- -0 1a u tnerrucnwodtuhs dd vi ds_ddv v ne i,v0= tuo daolon =- -- -1a u egatlovecnereferlanretni egatlovkcabdee fv bf t,noitidnocmcc a 52= o c9 9. 011 0. 1v tnerructupnib fi bf v bf t,v1= a 52= o c- -1 0. 02 . 0a u srevirdtuptuo ecnatsiserhctiwsrepp ur etagh i,ecruos etagh am051- =2 . 123 ? i,knis etagh am051- =6 . 018 .1 ecnatsiserhctiwsrewo lr etagl i,ecruos etagl am051- =6 . 012 .2 ? i,knis etagl am051- =4 . 07 . 02 .1 emitdae dt d no-etaglotffo-etag h7 7 10 3 sn no-etaghotffo-etag l0 12 25 3 egrahcsidtuovfobf vv sid_bf egrahcsidtuo v- -1 . 1- - v siseretsy h- -5 0. 0- - lortnocycneuqerfdnaytud emi-ffo mumini mt nim_ffo - -0 0 7- -s n emit-no mumini mt nim_no v ni v,v8.3= tuo v5 =- -0 4 2- -s n ycneuqer ff ws - -0 5 4- -z hk tratstfos emittratstfo st ss %59=tuovothgihnev mor f- -8- -s m dlohserhtcigol egatlovdlohserhtnip n ev ne elban e8 . 1- -- - v elbasi d- -- -5 .0 emit-n ot no r tr = ,nep of xl zhk054= v ni v,v7.3= tuo i,v9= tuo daolon= - -2 2. 1- -s u tnerructupnin ei ne v5=ne v- -- -1a u esnestnerruc:noitcetorp tnerrucecruos pc oi sc v pco v1 =9 0 11 1a u feocpme t- -0 00 4- -/ mpp o c upi confidential
conceptual UP6055 8 UP6055-ds-c3300, june 2017 www.upi-semi.com electrical characteristics retemara pl obmy ss noitidnoctse tn i mp y tx a ms tinu pvo dnapvu:noitcetorp egatlovdlohserhtpv ov pvo dd v8 .5 18 .6 18 .7 1v egatlovdlohserhtpv uv pvu b f- -3 . 0- -v emityalednoitagaporp pv ut ledpvu - -3 . 3- -s m emityaled pvutuptu ot nepvu elbakrow pvuotelbane mor f- -5 .3 1- -s m egatlov odl gerv egatlovtuptuo od lv ger 526. 40 . 55 73. 5v tnerructuptuo od li ger - -- -0 5a m egatlovtuo pord od lv pord ,v5.4= dd vi ger am02 =- -0 0 3- -v m nwodtuhslamreht dlohserhtnwodtuhslamreh tt nds erutarepmetnwodtuh s- -0 3 1- - o c siseretsy h- -0 3- - upi confidential
conceptual UP6055 9 UP6055-ds-c3300, june 2017 www.upi-semi.com typical operation characteristics this page is intentionally left blank and will be updated when data is available. upi confidential
conceptual UP6055 10 UP6055-ds-c3300, june 2017 www.upi-semi.com application information this page is intentionally left blank and will be updated when data is available. upi confidential
conceptual UP6055 11 UP6055-ds-c3300, june 2017 www.upi-semi.com package information note 1.package outline unit description: bsc: basic. represents theoretical exact dimension or dimension target min: minimum dimension specified. max: maximum dimension specified. ref: reference. represents dimension for reference use only. this value is not a device specification. typ. typical. provided as a general value. this value is not a device specification. 2.dimensions in millimeters. 3.drawing not to scale. 4.these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.15mm. vqfn3x3 - 16l 2.90 - 3.10 pin 1 mark bottom view - exposed pad 1.40-1.80 0.18 - 0.30 1.40 - 1.80 0.30 - 0.50 2.90 - 3.10 0.00 - 0.05 0.20 ref 0.70 - 0.80 upi confidential
conceptual UP6055 12 UP6055-ds-c3300, june 2017 www.upi-semi.com important notice upi and its subsidiaries reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. upi products are sold subject to the taerms and conditions of sale supplied at the time of order acknowledgment. however, no responsibility is assumed by upi or its subsidiaries for its use or application of any product or circuit; nor for any infringements of patents or other rights of third parties which may result from its use or application, including but not limited to any consequential or incidental damages. no upi components are designed, intended or authorized for use in military, aerospace, automotive applications nor in systems for surgical implantation or life-sustaining. no license is granted by implication or otherwise under any patent or patent rights of upi or its subsidiaries. copyright ( c ) 2016, upi semiconductor corp. upi semiconductor corp. headquarter 9f.,no.5, taiyuan 1st st. zhubei city, hsinchu taiwan, r.o.c. tel : 886.3.560.1666 fax : 886.3.560.1888 upi semiconductor corp. sales branch office 12f-5, no. 408, ruiguang rd. neihu district, taipei taiwan, r.o.c. tel : 886.2.8751.2062 fax : 886.2.8751.5064 upi confidential

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